Pipelined System On Chip (SoC)
for JPEG encoding
Embedded Systems
University Project
This project was carried out under the CO503 – Advanced Embedded Systems course (Individual Project) at the Department of Computer Engineering, University of Peradeniya.
The objective was to design and implement a five-stage pipelined System-on-Chip (SoC) that converts BMP image files into the JPEG format. Splitting the JPEG encoding workflow into pipeline stages allows different parts of an image to be processed concurrently, significantly improving throughput compared to a purely sequential implementation.
A demonstration of the working system is available on YouTube.
